A Simplified Svpwm for Five Level Inverter with DC-Link Balancing
B. Sreenivasa Raju1, M.Lokesh2
1B.Sreenivasa Raju, Assistant Professor in Madanapalle Institute of Technology and Science, Madanapalle.
2M. Lokesh, Assistant Professor in Madanapalle Institute of Technology and Science, Madanapalle.
Manuscript received on July 30, 2013. | Revised Manuscript received on August 14, 2013. | Manuscript published on August 30, 2013. | PP: 195-201 | Volume-2, Issue-6, August 2013.  | Retrieval Number: F2025082613/2013©BEIESP

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Abstract: The objective this paper presents a five level & three-level inverter topology for induction motor loads with dc link voltage stabilization. Presently diode-clamped inverter was used and it is also known as neutral point clamped (NPC) inverter is most favorable among various multilevel configurations. DC-link unbalance may overstress the capacitors and devices during a sudden regenerative load increase, and it can also cause nuisance over voltage or under voltage trips. A space vector based PWM scheme is proposed for power circuit configuration to have the dc link voltage balancing. This PWM scheme requires only instantaneous phase reference voltages for its implementation in the full modulation range. A SVPWM technique is also used to reduce the switching losses. In complete modulation range & power factor the capacitor voltage stabilization at the input side of the inverter is obtained. An open loop control scheme is presented, which uses only availability redundant switching states to obtain three-level inverter DC-link balancing & the current flow model of the five-level inverter to obtain the DC-link balancing. This proposed three-level inverter & five- level inverter SVPWM scheme is studied through MATLAB simulations
Keywords: DC- link balance, Multilevel Inverter, SVPWM.