Efficient Cell Sizing Of Single Precision Floating Point ALU for DSP Applications
D.V.Sivasai1, N.Srinivasulu2, Dr. P Satyanarayana3, D.Kondamacharyulu4

1D.v.sivasai, Department of Electronics and Communication Engineering, klef, Guntur (A.P), India.
2N.srinivasulu, Department of Electronics and Communication Engineering, klef, Guntur (A.P), India.
3D.kondamacharyulu, Department of Electronics and Communication Engineering, klef, Guntur (A.P), India.
4Dr. P Satyanarayana, Department of Electronics and Communication Engineering, klef, Guntur (A.P), India.

Manuscript received on 18 April 2019 | Revised Manuscript received on 25 April 2019 | Manuscript published on 30 April 2019 | PP: 1374-1381 | Volume-8 Issue-4, April 2019 | Retrieval Number: D6730048419/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Technological advancement in satellite communication and signal processing technology, high frequency of operation with low noise margin is required. So the technological advancement has resulted in the introduction of digital technology where digital processing units had created more impact. The ALU plays a crucial role in digital technology by encrypting the data and providing more secrecy and security. Numerous ALU blocks are required in DSP units for the proper transfer of the signals. As a result various methodologies are introduced for the design of ALU unit. The most recent history of digital technology suggests that there is a rapid growth in various technological aspects leading to compression of technologies from micro level to Nano level at a very faster rate. So various lateral thinking methodologies had come into existence for the designing process. This led to a thought of designing a most significantly used digital block of the circuitry with the help of advantageous and advanced methods. In this paper where the basic problem in the blocks like sizing can be reduced and power consumption can be explained. A righteous and well executed tools are used in the design methodology to properly regulate and monitor the basic parameters. Most preferable XILINX VIVADO is used in the process of design.
Keywords: Digital Signal Processing ,Single Precision, IEEE 754 PROTOCOL, SOC

Scope of the Article: I