A Design of Phase Locked Loop Based Frequency Synthesizer using 4/5 Prescaler Circuit
T.Kalavathi Devi1, P.Sakthivel2

1Dr.T.Kalavathi Devi, Department of EIE, Kongu Engineering College/ Perundurai (Tamil Nadu). India.
2Dr. P. Sakthivel, Department of EEE, Velalar College of Engineering and Technology, Thindal (Tamil Nadu), India.

Manuscript received on 18 April 2019 | Revised Manuscript received on 25 April 2019 | Manuscript published on 30 April 2019 | PP: 581-586 | Volume-8 Issue-4, April 2019 | Retrieval Number: D6125048419/19©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In the arena of communication, The Phase Locked Loop plays an important role in maintaining the phase lock by comparing the output frequency with the input frequency. Because of its wide variety of application such as frequency synthesizers, tracking satellite, demodulation and telecommunication, it needs to operate with low power. The Phase Locked Loop based frequency synthesizer is designed and it uses swallow counter in order to acquire a series of continuous division by working together with dual modulus prescaler. When the static logic is used in the design, it operates with low power but increases delay. When it operates in dynamic logic it consumes more power but speed of operation increases as there is reduced delay. In order to attain both the advantages of static and dynamic logic, Dual Mode Logic method is proposed in the design. In Dual Mode Logic the circuit operates both in static and dynamic modes of operation. In static mode it saves power and in dynamic mode the performance increases. The simulation result shows that the suggested method yields better performance when compared with the CMOS logic for a technology of 0.25um,180nm
Keywords: Dual Mode Logic, Phase Locked Loop, Phase Frequency Detector, Voltage Controlled Oscillator, Prescaler.

Scope of the Article: Frequency Selective Surface