Design of a 1.5-V, 4-bit Flash ADC using 90nm Technology
Arunkumar. P. Chavan1, Rekha. G2, P. Narashimaraja3
1Arunkumar P Chavan, Department of Electronics and Communication, R V College of Engineering, Bangalore, India.
2Rekha G, Department of Electronics and Communication, R V College of Engineering, Bangalore, India.
3P Narashimaraja, Department of Electronics and Communication, R V College of Engineering, Bangalore, India.
Manuscript received on November 22, 2012. | Revised Manuscript received on December 07, 2012. | Manuscript published on December 30, 2012. | PP: 274-276 | Volume-2, Issue-2, December 2012. | Retrieval Number: B0932112212 /2012©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: In this paper, a 4bit analog to digital converter is designed for low power CMOS. It requires 2N -1 comparators, an encoder to convert thermometer code to binary code. The design is simulated in cadence environment using spectre simulator under 90nm technology. The pre simulation results for the design shows a low power dissipation of 1.984mW for the designed ADC. The circuit operates with an input frequency of 25MHz and 1.5V supply with a conversion time of 6.182ns.
Keywords: CMOS comparator, Thermometer encoder, Flash ADC, Low-power.