Design and Integration of NAND Flash Memory Controller for Open Power-based Fabless SoC
Shanmukha Sai Nikhil Myramuru1, S. Chandra Mohan Reddy2, Gannera Mamatha3
1Shanmukha Sai Nikhil Myramuru, M.Tech Student, Department of Electronics and Communication Engineering, JNTUACEA, Ananthapur, (A.P), India.
2Dr. S. Chandra Mohan Reddy, Associate Professor, Department of Electronics and Communication Engineering, JNTUACEA, Ananthapur, (A.P), India.
3Dr. Gannera Mamatha, Assistant Professor, Department of Electronics and Communication Engineering, JNTUACEA, Ananthapur, (A.P), India.
Manuscript received on 15 March 2022 | Revised Manuscript received on 10 December 2022 | Manuscript Accepted on 15 December 2022 | Manuscript published on 30 December 2022 | PP: 137-144 | Volume-12 Issue-2, December 2022 | Retrieval Number: 100.1/ijeat.D34700411422 | DOI: 10.35940/ijeat.D3470.1212222
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: NAND Flash Memory has replaced EEPROM and hard drives as Non-volatile. Data is stored in sequential order in NAND Flash Memory. NAND Memory is a type of flash memory widely used in mobile phones and System on Chips (SoC). The Memory controller supports an 8-bit NAND Flash interface and streaming interface towards АXI4. The data transfer between АXI4 and NAND Flash Memory is carried оut by using NAND Flash commands sequences. The AXI4 Interface enables the usage of various рrоtосоls. To improve the flash memory controller’s data access speed. This project intends to design, develop, and integrate a NAND Flash memory controller using an AXI4 interface for an open POWER Processor A20 fabless SOC. The Flash Memory Controller includes Finite State Machines (FSM) and AXI4 bridge logic. Using Mentor Graphics® and Xilinx’s Viva do design suite, the test results were based on behavioral simulation and synthesis.
Keywords: SoC, Memory Controller, NAND Flash Memory, AXI4, A2O
Scope of the Article: Memory Controller