Design of Two Level DWT Architecture for Multimedia Applications
G. Nagarjuna Reddy1, MahendraVucha2
1G. Nagarjuna Reddy, Department of Electronics & Communication Engineering, KL University, Vijayawada.
2Mahendra Vucha, Department of Electronics & Communication Engineering, KL University, Vijayawada.
Manuscript received on March 12, 2013. | Revised Manuscript received on April 13, 2013. | Manuscript published on April 30, 2013. | PP: 370-373 | Volume-2, Issue-4, April 2013. | Retrieval Number: D1557042413/2013©BEIESP
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Images are to be transmitted without loss of information. That can be achieved by transforming using Discrete Wavelet Transform (DWT). The discrete wavelet transform (DWT) is being increasingly used for image coding. This is due to the fact that DWT supports features like progressive image transmission (by quality, by resolution), ease of transformed image manipulation, region of interest coding, etc. Hence, there is a need of design efficient & fast architecture for DWT. This paper is introducing an efficient architecture to enhance speed of DWT Computation. The Discrete Wavelet Transform (DWT) is based on time-scale representation, which provides efficient multi-resolution. The introduced architecture increases levels of DWT architecture to achieve lower computational complexity and reduced memory. As the DWT traditionally been implemented by convolution which demands both a large number of computations and a large storage features that are not desirable for either high-speed or low-power applications. This paper describes Lossless 2-D DWT (Discrete Wavelet Transform) using Lifting Scheme Architecture to reduce computational overheads. The behavior of designed DWT architecture is modeled using the Verilog HDL and functionality could be verified using the Modelsim simulation tool.
Keywords: Discrete wavelet transform, very-large-scale integration (VLSI), folded architecture, single-input, single-output.