Design of A Low Voltage Low Power CMOS Current Mirror with Enhanced Dynamic Range
Ramanand Harijan1, Padma Devi2, Pawan Kumar3
1Ramanand Harijan, Department of ECE & EEE, BM Group of Institution, Gurgaon, India.
2Padma Devi, Department of  ECE, CTIEMT, Shahpur, Jalandhar, India.
3Pawan Kumar, Department of  ECE , GITM Bilashpur Gurgaon, India.
Manuscript received on January 26, 2013. | Revised Manuscript received on February 17, 2013. | Manuscript published on February 28, 2013. | PP: 632-636 | Volume-2 Issue-3, February 2013.  | Retrieval Number: C1211022313/2013©BEIESP

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Abstract: 32A novel cascode current mirror (CM), suitable for operation at low voltage levels is presented. The mirror has high input and high output voltage swings. The presented current mirror circuit combines the advantages of wide input swing, wide output swing and large output resistance capability which makes it attractive for low-voltage and low power application. Based on IBM 0.18um MOS model parameters, TSPICE simulation results show that the input current range of 1uA to 2mA with 882.83MHz bandwidth for the presented level shifted low voltage current mirror circuit. The power dissipation has improved by more than 40%.
Keywords: Current mirror, Low voltage current mirror, level shifted Current mirror, Level shifted low voltage current mirror, Dynamic range.