Approximate Adder Implementation using Quantum- Dot Cellular Automata for Digital Signal Processing
Manju K. Chattopadhyay1, Kavita T. Upadhyay2, Rameez R. Chowdhary3, Neha B. Pande4
1Manju K. Chattopadhyay*, School of Electronics, Devi Ahilya Vishwavidyalaya, Indore, (M.P), India.
2Kavita T. Upadhyay, Department of Electronics and Communication Engineering, IPS Academy, Institute of Engineering and Science, Indore, (M.P), India.
3Rameez R. Chowdhary, School of Electronics, Devi Ahilya Vishwavidyalaya, Indore, (M.P), India.
4Neha B. Pande, Department of Electronics and Telecommunication Engineering, Institute of Engineering and Technology, Devi Ahilya University, Indore, (M.P), India.
Manuscript received on November 22, 2019. | Revised Manuscript received on December 15, 2019. | Manuscript published on December 30, 2019. | PP: 3743-3748 | Volume-9 Issue-2, December, 2019. | Retrieval Number: B3298129219/2019©BEIESP | DOI: 10.35940/ijeat.B3298.129219
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: We explore quantum-dot cellular automata (QCA) design for approximate computing units in digital signal processors. For this cause, a common approach for design is introduced, and approximation-oriented mirror adders (AMA) are developed. In this work, we compromise power/area efficiency of circuit-level design with accuracy supervision. We compare Approximate Mirror Adder cells designed using conventional CMOS technique and using QCA. Our technique picks fairly accurate adder designs that minimalize the over-all area, hitherto maintaining the ultimate performance by studying their error resilience.
Keywords: QCA, Mirror Adder, Approximation-oriented, nanotechnology.