Energy Efficient Light Weight Security Algorithm for Low Power IoT Devices
B. Nagajayanthi, Department of Electronics Engineering, VIT Chennai Campus, Chennai (Tamil Nadu), India.
Manuscript received on 14 December 2019 | Revised Manuscript received on 22 December 2019 | Manuscript Published on 31 December 2019 | PP: 45-50 | Volume-9 Issue-1S3 December 2019 | Retrieval Number: A10101291S319/19©BEIESP | DOI: 10.35940/ijeat.A1010.1291S319
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Internet of Things (IoT) is the state of art which connects, communicates, intelligently resolves and processes data between physical devices and smart phone or to a centralized server. Billions of users are centrally coordinated via the internet. The number of ubiquitous IoT devices will surpass the number of humans. For secured data transfer, IoT requires strenuous focus on security. Inspite of the secured IoT layered approach integrated in its architecture, yet they are susceptible to thwarting attacks. With proliferating applications and innovations, there is a stringent need to preserve user privacy and anonymize interactions using a lightweight cryptographic algorithm. Existing cryptographic algorithms have constraints on power, limited battery, real time execution, latency, code length and memory. In this research, initially comparison of the existing algorithms is made. Subsequently, Augmented Security and Optimized memory space is achieved for the data channelized via IoT by using the combination of the Light weight masked AES (Advanced Encryption Standard) and MD5 (Message Digest) hash algorithm. This chaining technique is implemented using VHDL Coding, Xilinx ISE and ModelSim 6.5 software tool. In the proposed algorithm, area, power and timing factors are reduced using optimization techniques, which drastically reduces the power consumed, and chip area. Chip area is calculated in terms of gate equivalents and power consumption is reduced through clock gating and operand isolation techniques.
Keywords: Chip Area, Gate Equivalents, Light Weight, S-Box.
Scope of the Article: IoT