Ternary Content Addressable Memory
P.K.Sisira1, N.Aswathy2, B. Prameela3, Anju George4
1P. K. Sisira, Student, Department of Electronics & Communication, APJ Abdul Kalam Technological University, (Kerala), India.
2N. Aswathy, Assistant Professor, Department of Electronics & Communication, Adi Shankara Institute of Engineering & Technology, Kalady (Kerala), India.
3B. Prameela, Assistant Professor, Department of Electronics & Communication, Adi Shankara Institute of Engineering & Technology, Kalady (Kerala), India.
4Anju George, Assistant Professor, Department of Electronics & Communication, Adi Shankara Institute of Engineering & Technology, Kalady (Kerala), India.
Manuscript received on 01 June 2020 | Revised Manuscript received on 10 June 2020 | Manuscript Published on 17 June 2020 | PP: 12-16 | Volume-9 Issue-4s May 2020 | Retrieval Number: A10040594S20/20©BEIESP | DOI: 10.35940/ijeat.A1004.0594S20
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© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC-BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)
Abstract: Memory Technology plays a vital role in fast searching applications. Content Addressable Memory (CAM) is a special type of memory used for search operation. CAM provides access to the stored data by its content instead of the address. Advanced version of CAM is known as Ternary CAM (TCAM) which is a memory that can also store don’t care bit. TCAM is most relevant in routers in networking applications. Review of TCAM design techniques at different aspects are carried out, and obtained that an Energy Efficient TCAM (EE-TCAM) is the one which is having less power consumption. Compared with other SRAM-based TCAM designs, EE-TCAM use up reduced energy as it selectively activates only one row of SRAM at a time for search operation instead of activating the whole SRAM memory as in the other architectures. Partitioning of the TCAM table, designing of a pre-classifier and memory mapping are done prior to the work. This paper focuses on designing an EE-TCAM using Verilog HDL on Zybo7000 platform using Vivado design suite. Functional analysis of a 6*6 EE-TCAM is performed and power, delay and resource utilization are obtained. From the obtained results it is clear that EE-TCAM is having very less power and delay.
Keywords: Memory, TCAM, EE TCAM, Pre-Classifier.
Scope of the Article: IoT Applied for Digital Contents