Development, Integration and Verification of VHDL code for FPGA based Beam Position Measurement Board
Priti Trivedi1, Sudeep Baudha2
1Priti Trivedi, Department of Electronics & Communication, Gyan Ganga College of Technology, Jabalpur, India.
2Sudeep Baudha, Department of Electronics & Communication, Gyan Ganga College of Technology, Jabalpur, India.
Manuscript received on May 17, 2012. | Revised Manuscript received on June 22, 2012. | Manuscript published on June 30, 2012. | PP: 303-306 | Volume-1 Issue-5, June 2012. | Retrieval Number: E0524061512/2012©BEIESP

Open Access | Ethics and Policies | Cite
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: Continuous increase in FPGA capacity, architectural features and performance, along with decrease in cost, results in an ideal solution to hardware system designers. The embedded designer who is serious about increasing performance must consider the FPGAs ability to accelerate the processor performance with dedicated hardware. Although this technique consumes FPGA resources, the performance improvements can be extraordinary. Thus FPGA based VME Bus compatible four channels ADC card is used to acquire the Beam Position Indicator (BPI) electrode data, and calculate the beam position using an intelligence device (FPGA) on board. This card is having on-board 4-channel ADC (with signal conditioning electronics) and 8-channel Opto-coupler inputs. Additionally there is a memory available on-board to save calculated beam position. In all, the system is VME based so this card is a VME slave board where VME CPU card will be able to control the card and read the calculated beam position whenever it is available in memory. 
Keywords: FPGA, VME, 4-channel ADC, e-beam position and BPI.