Performance Examination of SEPIC Based Hybrid Cascaded Single-Phase Multilevel Inverter
Arunprasath R1, Vijayakumar D2, Rathinakumar M3, Meikandasivam S4, Kirubakaran A5

1*Arunprasath R, research scholar, SCSVMV University, Kanchipuram, India.
2Vijayakumar D, chool of Electrical Engineering, VIT University, Vellore, India.
3Meikandasivam S, School of Electrical Engineering, VIT University, Vellore, India.
4Rathinakumar M, Department of Electrical Engineering, SCSVMV University, Kanchipuram, India.
5Kirubakaran A, Department of Electrical Engineering, NIT Warangal, India,
Manuscript received on November 26, 2019. | Revised Manuscript received on December 15, 2019. | Manuscript published on December 30, 2019. | PP: 3644-3648  | Volume-9 Issue-2, December, 2019. | Retrieval Number:  B2288129219/2019©BEIESP | DOI: 10.35940/ijeat.B2288.129219
Open Access | Ethics and Policies | Cite | Mendeley
© The Authors. Blue Eyes Intelligence Engineering and Sciences Publication (BEIESP). This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/)

Abstract: In the present scenario, reduced part count(RPC) multilevel inverters are become popular compared to traditional multilevel inverters(MLIs). This is mainly due to reduced size and cost and alleviates the issues of more passive components, flying capacitor voltage balancing issues and the requirement of complex switching schemes. Also, the RPC is getting attraction for various industrial and transportation applications. Therefore, in this paper, a novel 17 level inverter is proposed by cascading MLIs with the reduced part count. The complete operation, switching schemes and output are presented to evolve the performance under steady-state conditions using MATLAB software.
Keywords: Multilevel inverter, DC-DC boost converter, sinusoidal pulse width modulation (SPWM).